In the past few years, I've served in the NoCArc workshop contributing in different positions up to covering the role of TPC co-chair in the 12th and 13th editions, and General co-chair in the 14th edition. NoCArc (International Workshop on Network on Chip architectures) focuses on the design, analysis, testing, and application of on-chip networks, and since its first edition is held in conjunction with the IEEE/ACM International Symposium on Microarchitecture® (MICRO). The workshop has been supported by ACM SIGMICRO, IEEE Circuits and Systems Society (VSATC), and IEEE Computer Society (TCuARCH).
Thanks to the experience within this workshop, I had the chance to be Guest Editor for the Nano Communication Networks Journal - Elsevier, Special Issue on Chip-scale Nanonetworks: Recent Trends, Emerging Technologies, Disruptive Applications and for the Journal of Low Power Electronics and Applications (JLPEA) - MDPI, Special Issue on Research Trends in Network-on-Chip Architectures and Selected Papers from NoCArc 2020.
I am Reviewer Editor for Frontiers in Communications and Networks, section Non-Conventional Communications and Networks. Finally, I have the honor to be part of the Editorial Board of Exchanges: The Interdisciplinary Research Journal.